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SubjectRe: [RFC PATCH v2] irqchip: Add support for tango interrupt router
On 12/07/2017 18:39, Mason wrote:

> 128 inputs, 24 outputs (to GIC SPI 0-23)
> There might be a few things wrong with this driver. When I
> cat /proc/interrupts the interrupt count appears to be bogus
> (as if level IRQ counts are added to edge IRQ counts).

OK, I found the issue.

It occurred on the interrupt lines that stay high when
the HW block is idle, so I mishandled them on every
level interrupt.

I have two remaining issues:

1) In the ISR, I get the hwirq from the GIC. What is the
API to translate that to the SPI? I'm currently just
subtracting 32.

2) I'm currently using a single domain, with a
handle_simple_irq domain handler. That's probably
wrong. Should I define two domains, one for edge
IRQs and one for level IRQs, and use the appropriate
handler? Should both domain have 128 entries?
(I.e. are they indexed by the hwirq?)
And should I use linear or tree?


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