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    Subject[PATCH 4.9 28/41] pinctrl: sh-pfc: r8a7791: Add missing HSCIF1 pinmux data
    Date
    4.9-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

    commit da7a692fbbab07f4e9798b5b52798f6e3256dd8f upstream.

    The R8A7791 PFC driver was apparently based on the preliminary revisions
    of the user's manual, which omitted the HSCIF1 group E signals in the
    IPSR4 register description. This would cause HSCIF1's probe to fail with
    the messages like below:

    sh-pfc e6060000.pfc: cannot locate data/mark enum_id for mark 1989
    sh-sci e62c8000.serial: Error applying setting, reverse things back
    sh-sci: probe of e62c8000.serial failed with error -22

    Add the neceassary PINMUX_IPSR_MSEL() invocations for the HSCK1_E,
    HCTS1#_E, and HRTS1#_E signals...

    Fixes: 508845196238 ("pinctrl: sh-pfc: r8a7791 PFC support")
    Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
    Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 3 +++
    1 file changed, 3 insertions(+)

    --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
    +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
    @@ -1010,14 +1010,17 @@ static const u16 pinmux_data[] = {
    PINMUX_IPSR_MSEL(IP4_12_10, SCL2, SEL_IIC2_0),
    PINMUX_IPSR_MSEL(IP4_12_10, GPS_CLK_B, SEL_GPS_1),
    PINMUX_IPSR_MSEL(IP4_12_10, GLO_Q0_D, SEL_GPS_3),
    + PINMUX_IPSR_MSEL(IP4_12_10, HSCK1_E, SEL_HSCIF1_4),
    PINMUX_IPSR_GPSR(IP4_15_13, SSI_WS2),
    PINMUX_IPSR_MSEL(IP4_15_13, SDA2, SEL_IIC2_0),
    PINMUX_IPSR_MSEL(IP4_15_13, GPS_SIGN_B, SEL_GPS_1),
    PINMUX_IPSR_MSEL(IP4_15_13, RX2_E, SEL_SCIF2_4),
    PINMUX_IPSR_MSEL(IP4_15_13, GLO_Q1_D, SEL_GPS_3),
    + PINMUX_IPSR_MSEL(IP4_15_13, HCTS1_N_E, SEL_HSCIF1_4),
    PINMUX_IPSR_GPSR(IP4_18_16, SSI_SDATA2),
    PINMUX_IPSR_MSEL(IP4_18_16, GPS_MAG_B, SEL_GPS_1),
    PINMUX_IPSR_MSEL(IP4_18_16, TX2_E, SEL_SCIF2_4),
    + PINMUX_IPSR_MSEL(IP4_18_16, HRTS1_N_E, SEL_HSCIF1_4),
    PINMUX_IPSR_GPSR(IP4_19, SSI_SCK34),
    PINMUX_IPSR_GPSR(IP4_20, SSI_WS34),
    PINMUX_IPSR_GPSR(IP4_21, SSI_SDATA3),

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