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Subject[PATCH v8 0/3] Add support for Qualcomm A53 CPU clock
This patchset adds support for the A53 CPU clock and allows scaling
of the CPU frequency on msm8916 based platforms.

Changes since v7 (
* Add the APCS clock controller to the APCS driver to expose both the
mailbox and clock controller functionality as discussed earlier:
* Changed the a53pll compatible string as suggested by Rob.

Changes since v6 (
* Addressed various comments from Stephen Boyd

Changes since v5 (
* Rebase to clk-next and update according to the recent API changes.

Changes since v4 (
* Convert to builtin drivers as now __clk_lookup() is used

Changes since v3 (
* Split driver into two parts - and separate A53 PLL and
A53 clock controller drivers.
* Drop the safe switch hook patch. Add a clock notifier in
the clock provider to handle switching via safe mux and
divider configuration.

Changes since v2 (
* Drop gpll0_vote patch.
* Switch to the new clk_hw_* APIs.
* Rebase to the current clk-next.

Changes since v1 (
* Drop SR2 PLL patch, as it is already applied.
* Add gpll0_vote rate propagation patch.
* Update/rebase patches to the current clk-next.

Georgi Djakov (3):
clk: qcom: Add A53 PLL support
clk: qcom: Add regmap mux-div clocks support
mailbox: qcom: Add support for APCS clock controller

.../devicetree/bindings/clock/qcom,a53pll.txt | 22 ++
.../bindings/mailbox/qcom,apcs-kpss-global.txt | 5 +
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile | 2 +
drivers/clk/qcom/a53-pll.c | 94 ++++++++
drivers/clk/qcom/clk-regmap-mux-div.c | 237 +++++++++++++++++++++
drivers/clk/qcom/clk-regmap-mux-div.h | 52 +++++
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 122 +++++++++++
8 files changed, 543 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt
create mode 100644 drivers/clk/qcom/a53-pll.c
create mode 100644 drivers/clk/qcom/clk-regmap-mux-div.c
create mode 100644 drivers/clk/qcom/clk-regmap-mux-div.h

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