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SubjectRe: [PATCH v9 0/3] Cavium ThunderX2 SMMUv3 errata workarounds
On Thu, Jun 22, 2017 at 05:35:35PM +0530, Geetha sowjanya wrote:
> Cavium ThunderX2 SMMUv3 implementation has two Silicon Erratas.
> 1. Errata ID #74
> SMMU register alias Page 1 is not implemented
> 2. Errata ID #126
> SMMU doesnt support unique IRQ lines and also MSI for gerror,
> eventq and cmdq-sync
>
> The following patchset does software workaround for these two erratas.

I've picked up the first two patches, and left comments on the final patch.

Will

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