Messages in this thread | | | Date | Wed, 17 May 2017 12:11:54 -0500 | From | Bjorn Helgaas <> | Subject | Re: [PATCH v6 2/3] iommu/pci: reserve IOVA for PCI masters |
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On Tue, May 16, 2017 at 10:52:06AM +0530, Oza Pawandeep wrote: > this patch reserves the IOVA for PCI masters. > ARM64 based SOCs may have scattered memory banks. > such as iproc based SOC has > > <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */ > <0x00000008 0x80000000 0x3 0x80000000>, /* 14G @ 34G */ > <0x00000090 0x00000000 0x4 0x00000000>, /* 16G @ 576G */ > <0x000000a0 0x00000000 0x4 0x00000000>; /* 16G @ 640G */ > > but incoming PCI transcation addressing capability is limited
s/transcation/transaction/
> by host bridge, for example if max incoming window capability > is 512 GB, then 0x00000090 and 0x000000a0 will fall beyond it. > > to address this problem, iommu has to avoid allocating IOVA which
s/iommu/IOMMU/
> are reserved. which inturn does not allocate IOVA if it falls into hole.
s/inturn/in turn/
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