Messages in this thread | | | Subject | Re: [PATCH] nand_base: optimize checking of erased buffers | From | Mason <> | Date | Wed, 17 May 2017 13:39:16 +0200 |
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On 17/05/2017 13:27, Mason wrote:
> On 21/04/2017 12:51, Pavel Machek wrote: > >> If we see ~0UL in flash, there's no need for hweight, and no need to >> check number of bitflips. So this should be net win. >> >> Signed-off-by: Pavel Machek <pavel@denx.de> >> >> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c >> index b0524f8..96c27ec 100644 >> --- a/drivers/mtd/nand/nand_base.c >> +++ b/drivers/mtd/nand/nand_base.c >> @@ -1357,7 +1357,10 @@ static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold) >> >> for (; len >= sizeof(long); >> len -= sizeof(long), bitmap += sizeof(long)) { >> - weight = hweight_long(*((unsigned long *)bitmap)); > > I hadn't noticed this earlier. There is, obviously, an implicit > requirement that 'buf' must be 4-byte aligned on 32-bit platforms, > and 8-byte aligned on 64-bit platforms. > > This is not true for my platform, as the ecc pointer is > chip->oob_poi + 10
Doh! As Boris points out, the prologue/epilogue handle all alignment & size issues.
Regards.
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