lkml.org 
[lkml]   [2017]   [May]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: frv build failure in mainline kernel
Date
Guenter Roeck <linux@roeck-us.net> wrote:

> Turns out not here because ____cacheline_aligned_in_smp includes
> __page_aligned_data which also declares the section, at least on x86.

If there's any sort of section specification, that should suffice, I think.
The problem might come that jiffies and jiffies_64 don't coincide at the same
address because FRV is BE not LE.

It ought to be possible to make jiffies 64-bit on FRV since it has double-word
instructions that can load/store aligned 64-bit values atomically to/from a
register pair. That might require some compiler magic, though. I'll have to
try and work out if that's possible.

David

\
 
 \ /
  Last update: 2017-05-16 18:20    [W:0.104 / U:0.116 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site