Messages in this thread | | | Date | Wed, 5 Apr 2017 14:50:46 -0700 | From | Stephen Boyd <> | Subject | Re: [PATCH v5 2/2] iio: Aspeed ADC |
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On 04/01, Jonathan Cameron wrote: > On 28/03/17 22:52, Rick Altherr wrote: > > Aspeed BMC SoCs include a 16 channel, 10-bit ADC. Low and high threshold > > interrupts are supported by the hardware but are not currently implemented. > > > > Signed-off-by: Rick Altherr <raltherr@google.com> > Two really trivial things inline. I'll fix them whilst applying rather than > having you do a v6 - please do sanity check I haven't messed it up though! > > Applied to the togreg branch of iio.git and pushed out as testing for > the autobuilders to play with it. >
Oh I was too late. Blame work. Anyway, I made some comments on v4. If they're fixed in a later patch or discussed on list that's fine. No worries on my end.
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