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    Subject[PATCH v4 01/11] dt-bindings: add binding for the Allwinner DE2 CCU
    Date
    Allwinner "Display Engine 2.0" contains some clock controls in it.

    In order to add them as clock drivers, we need a device tree binding.
    Add the binding here.

    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
    ---
    Changes in v4:
    - Dropped the leading 0 in clock@1000000 .
    Changes in v3:
    - Fill the address space length of DE2 CCU to 0x100000, just reach the start of mixer0.

    .../devicetree/bindings/clock/sun8i-de2.txt | 31 ++++++++++++++++++++++
    1 file changed, 31 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/clock/sun8i-de2.txt

    diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
    new file mode 100644
    index 000000000000..15a60bd7dcf3
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
    @@ -0,0 +1,31 @@
    +Allwinner Display Engine 2.0 Clock Control Binding
    +--------------------------------------------------
    +
    +Required properties :
    +- compatible: must contain one of the following compatibles:
    + - "allwinner,sun8i-a83t-de2-clk"
    + - "allwinner,sun50i-a64-de2-clk"
    + - "allwinner,sun50i-h5-de2-clk"
    +
    +- reg: Must contain the registers base address and length
    +- clocks: phandle to the clocks feeding the display engine subsystem.
    + Three are needed:
    + - "mod": the display engine module clock
    + - "bus": the bus clock for the whole display engine subsystem
    +- clock-names: Must contain the clock names described just above
    +- resets: phandle to the reset control for the display engine subsystem.
    +- #clock-cells : must contain 1
    +- #reset-cells : must contain 1
    +
    +Example:
    +de2_clocks: clock@1000000 {
    + compatible = "allwinner,sun50i-a64-de2-clk";
    + reg = <0x01000000 0x100000>;
    + clocks = <&ccu CLK_DE>,
    + <&ccu CLK_BUS_DE>;
    + clock-names = "mod",
    + "bus";
    + resets = <&ccu RST_BUS_DE>;
    + #clock-cells = <1>;
    + #reset-cells = <1>;
    +};
    --
    2.12.2
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