lkml.org 
[lkml]   [2017]   [Mar]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH] ARM: nommu: access ID_PFR1 only if CPUID scheme
From
Date
Hi Afzal,

On 23/03/17 20:43, afzal mohammed wrote:
> On Fri, Mar 17, 2017 at 10:10:34PM +0530, afzal mohammed wrote:
>> Greg upon trying to boot no-MMU Kernel on ARM926EJ reported boot
>> failure. He root caused it to ID_PFR1 access introduced by the
>> commit mentioned in the fixes tag below.
>>
>> All CP15 processors need not have processor feature registers, only
>> for architectures defined by CPUID scheme would have it. Hence check
>> for it before accessing processor feature register, ID_PFR1.
>>
>> Fixes: f8300a0b5de0 ("ARM: 8647/2: nommu: dynamic exception base address setting")
>> Reported-by: Greg Ungerer <gerg@uclinux.org>
>> Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
>
> Greg, can i add your Tested-by ?

Absolutely:

Tested-by: Greg Ungerer <gerg@uclinux.org>

Thanks for taking care of this.

Regards
Greg


>> ---
>>
>> Hi Russell,
>>
>> It would be good to have the fix go in during -rc, as,
>>
>> 1. Culprit commit went in during the last merge window
>> 2. Though nothing supported in mainline is known to be broken, the
>> original change needs to be modified to be reliable
>

\
 
 \ /
  Last update: 2017-03-23 12:49    [W:0.057 / U:0.432 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site