Messages in this thread | | | From | Andy Shevchenko <> | Date | Wed, 8 Feb 2017 00:44:52 +0200 | Subject | Re: [PATCH 3/7] serial: exar: Fix feature control register constants |
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On Tue, Feb 7, 2017 at 6:10 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote: > According to the XR17V352 manual, bit 4 is IrDA control and bit 5 for > 485. Fortunately, no driver used them so far.
RS-485
>
FWIW: Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> > --- > include/uapi/linux/serial_reg.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h > index 274d8fc..25b93a7 100644 > --- a/include/uapi/linux/serial_reg.h > +++ b/include/uapi/linux/serial_reg.h > @@ -374,8 +374,8 @@ > #define UART_EXAR_DVID 0x8d /* Device identification */ > > #define UART_EXAR_FCTR 0x08 /* Feature Control Register */ > -#define UART_FCTR_EXAR_IRDA 0x08 /* IrDa data encode select */ > -#define UART_FCTR_EXAR_485 0x10 /* Auto 485 half duplex dir ctl */ > +#define UART_FCTR_EXAR_IRDA 0x10 /* IrDa data encode select */ > +#define UART_FCTR_EXAR_485 0x20 /* Auto 485 half duplex dir ctl */ > #define UART_FCTR_EXAR_TRGA 0x00 /* FIFO trigger table A */ > #define UART_FCTR_EXAR_TRGB 0x60 /* FIFO trigger table B */ > #define UART_FCTR_EXAR_TRGC 0x80 /* FIFO trigger table C */ > -- > 2.1.4 >
-- With Best Regards, Andy Shevchenko
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