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    Subject[PATCH 4.4 04/29] drm/nouveau/nv1a,nv1f/disp: fix memory clock rate retrieval
    Date
    4.4-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Ilia Mirkin <imirkin@alum.mit.edu>

    commit 24bf7ae359b8cca165bb30742d2b1c03a1eb23af upstream.

    Based on the xf86-video-nv code, NFORCE (NV1A) and NFORCE2 (NV1F) have a
    different way of retrieving clocks. See the
    nv_hw.c:nForceUpdateArbitrationSettings function in the original code
    for how these clocks were accessed.

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54587
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/gpu/drm/nouveau/dispnv04/hw.c | 3 ++-
    1 file changed, 2 insertions(+), 1 deletion(-)

    --- a/drivers/gpu/drm/nouveau/dispnv04/hw.c
    +++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c
    @@ -222,6 +222,7 @@ nouveau_hw_get_clock(struct drm_device *
    uint32_t mpllP;

    pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
    + mpllP = (mpllP >> 8) & 0xf;
    if (!mpllP)
    mpllP = 4;

    @@ -232,7 +233,7 @@ nouveau_hw_get_clock(struct drm_device *
    uint32_t clock;

    pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
    - return clock;
    + return clock / 1000;
    }

    ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals);

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