Messages in this thread | | | Date | Fri, 8 Dec 2017 16:18:51 -0800 | From | Stephen Boyd <> | Subject | Re: [PATCH 05/13] clk: qcom: add and use alpha register width from PLL properties |
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On 09/28, Abhishek Sahu wrote: > Currently SUPPORTS_16BIT_ALPHA flag determines the PLL alpha > register width. If this flag is set then the alpha register width > is 16 bits otherwise it is 40 bits. The alpha width is always > fixed for PLL type so it can be added in PLL properties and clock > driver don’t have to specify explicitly. > > The SUPPORTS_16BIT_ALPHA flag is unused in the current code so > it’s safe to remove this flags. > > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> > ---
Applied to clk-next
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