Messages in this thread | | | From | Andy Lutomirski <> | Date | Mon, 4 Dec 2017 14:36:13 -0800 | Subject | Re: [patch 51/60] x86/mm: Allow flushing for future ASID switches |
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On Mon, Dec 4, 2017 at 2:34 PM, Dave Hansen <dave.hansen@intel.com> wrote: > On 12/04/2017 02:22 PM, Andy Lutomirski wrote: >>> + >>> + this_cpu_write(cpu_tlbstate.invalidate_other, true); >> >> Why do we need this extra variable instead of just looping over all >> other ASIDs and invalidating them? It would be something like: >> >> for (i = 1; i < TLB_NR_DYN_ASIDS; i++) { >> if (i != this_cpu_read(cpu_tlbstate.loaded_mm_asid)) >> this_cpu_write(cpu_tlbstate.ctxs[i].ctx_id, 0); >> } > > We have loops like this: > > for (addr = start; addr < end; addr += PAGE_SIZE) > flush_tlb_single();
Couldn't we just make those looks more intelligent:
for (...) flush_tlb_kernelmode_single(...);
if (kpti) invalidate_asid_other();
(Isn't there only one such look now, in flush_tlb_func_common()?)
--Andy
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