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SubjectRe: [PATCH] KVM: arm/arm64: don't set vtimer->cnt_ctl in kvm_arch_timer_handler
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On 15/12/17 02:27, Jia He wrote:
>
>

[...]

>> @@ -367,6 +368,7 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
>>
>> /* Disable the virtual timer */
>> write_sysreg_el0(0, cntv_ctl);
>> + isb();
> My only concern is whether this isb() is required here?
> Sorryif this is a stupid question.I understand little about arm arch
> memory barrier. But seems isb will flush all the instruction prefetch.Do
> you think if an timer interrupt irq arrives, arm will use the previous
> instruction prefetch?


This barrier has little to do with prefetch. It just guarantees that the
code after the isb() is now running with a disabled virtual timer.
Otherwise, a CPU can freely reorder the write_sysreg() until the next
context synchronization event.

An interrupt coming between the write and the barrier will also act as a
context synchronization event. For more details, see the ARMv8 ARM (the
glossary has a section on the concept).

Thanks,

M.
--
Jazz is not dead. It just smells funny...

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