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SubjectRe: [PATCH v5 3/3] KVM: nVMX: Fix mmu context after VMLAUNCH/VMRESUME failure
On 09/11/2017 11:47, Wanpeng Li wrote:
> 2017-11-09 18:40 GMT+08:00 Paolo Bonzini <>:
>> On 09/11/2017 01:37, Wanpeng Li wrote:
>>> 2017-11-09 5:47 GMT+08:00 Jim Mattson <>:
>>>> I realize now that there are actually many other problems with
>>>> deferring some control field checks to the hardware VM-entry of
>>>> vmcs02. When there is an invalid control field, the vCPU should just
>>>> fall through to the next instruction, without any state modifiation
>>>> other than the ALU flags and the VM-instruction error field of the
>>>> current VMCS. However, in preparation for the hardware VM-entry of
>>>> vmcs02, we have already changed quite a bit of the vCPU state: the
>>>> MSRs on the VM-entry MSR-load list, DR7, IA32_DEBUGCTL, the entire
>>>> FLAGS register, etc. All of these changes should be undone, and we're
>>>> not prepared to do that. (For instance, what was the old DR7 value
>>>> that needs to be restored?)
>>> I didn't observe real issue currently, and I hope this patchset can
>>> catch the upcoming merge window. Then we can dig more into your
>>> concern.
>> Can any of you write a simple testcase for just one bug (e.g. DR7)?
> Jim you can have a try for your concern, I have already tried tons of
> stress testing and didn't observe any issue.

You need to craft a testcase for kvm-unit-tests. No stress testing will
find an issue.

Your patch is fine, but Jim is saying that we cannot really skip the
check for invalid control fields. It's a more general issue that can be
fixed by adding explicit checks in KVM.


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