Messages in this thread | | | Subject | Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches | From | Dave Hansen <> | Date | Thu, 30 Nov 2017 07:51:17 -0800 |
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On 11/30/2017 07:44 AM, Peter Zijlstra wrote: > On Mon, Nov 27, 2017 at 11:49:14AM +0100, Ingo Molnar wrote: >> @@ -338,24 +366,23 @@ static inline void __native_flush_tlb_single(unsigned long addr) >> >> static inline void __flush_tlb_all(void) >> { >> + if (boot_cpu_has(X86_FEATURE_PGE)) { >> __flush_tlb_global(); >> + } else { >> __flush_tlb(); >> + tlb_flush_shared_nonglobals(); > I do however think this one is superfluous; if we do not have PGE we > also do not have PCID and every CR3 switch flushes everything.
I tried to sprinkle these around at all the sites that did non-global kernel flushes. In the case that it's superfluous !KAISER, it's a noop anyway. In the (currently unsupported) case that we *do* need it, well, we need it.
It also makes it a bit more self-documenting that __flush_tlb() does not flush shared non-globals.
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