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SubjectRe: [PATCH v5 2/3] KVM: nVMX: Validate the IA32_BNDCFGS on nested VM-entry
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On 11/02/2017 11:40 PM, Wanpeng Li wrote:
> 2017-11-03 14:31 GMT+08:00 Krish Sadhukhan <krish.sadhukhan@oracle.com>:
>>
>> On 11/02/2017 05:50 PM, Wanpeng Li wrote:
>>> From: Wanpeng Li <wanpeng.li@hotmail.com>
>>>
>>> According to the SDM, if the "load IA32_BNDCFGS" VM-entry controls is 1,
>>> the
>>> following checks are performed on the field for the IA32_BNDCFGS MSR:
>>> - Bits reserved in the IA32_BNDCFGS MSR must be 0.
>>> - The linear address in bits 63:12 must be canonical.
>>>
>>> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
>>> Cc: Paolo Bonzini <pbonzini@redhat.com>
>>> Cc: Radim Krčmář <rkrcmar@redhat.com>
>>> Cc: Jim Mattson <jmattson@google.com>
>>> Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>
>>> ---
>>> v3 -> v4:
>>> * simply condition
>>> * use && instead of nested "if"s
>>>
>>> arch/x86/kvm/vmx.c | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>>
>>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>>> index e6c8ffa..6cf3972 100644
>>> --- a/arch/x86/kvm/vmx.c
>>> +++ b/arch/x86/kvm/vmx.c
>>> @@ -10805,6 +10805,11 @@ static int check_vmentry_postreqs(struct kvm_vcpu
>>> *vcpu, struct vmcs12 *vmcs12,
>>> return 1;
>>> }
>>> + if (kvm_mpx_supported() &&
>>> + (is_noncanonical_address(vmcs12->guest_bndcfgs &
>>> PAGE_MASK, vcpu) ||
>>> + (vmcs12->guest_bndcfgs & MSR_IA32_BNDCFGS_RSVD)))
>>> + return 1;
>>> +
>>> return 0;
>>> }
>>>
>> Hi Wanpeng,
>> The SDM check is performed only when "load IA32_BNDCFGS" VM-entry control
>> is 1. But vmx_mpx_supported() returns true when both "load IA32_BNDCFGS" and
>> "store IA32_BNDCFGS" VM-entry controls are 1. Therefore your check is
>> performed when both controls are 1. Did I miss something here ?
> https://lkml.org/lkml/2017/11/2/748 Paolo hopes the simplification.
>
> Regards,
> Wanpeng Li
I got that simplification and your changes look good to me.


However, I am still curious know the reason why vmx_mpx_supported()
returns true only when both controls are true whereas the SDM states the
following:

"IA32_BNDCFGS (64 bits). This field is supported only on processors
that support either the 1-setting of the “load IA32_BNDCFGS” VM-entry
control or that of the “clear IA32_BNDCFGS” VM-exit control."

Thanks,
Krish

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