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SubjectRe: [PATCH 09/13] MIPS: mscc: Add initial support for Microsemi MIPS SoCs
Hi James, Alexandre,

On Tue, Nov 28, 2017 at 05:31:51PM +0000, James Hogan wrote:
> On Tue, Nov 28, 2017 at 05:53:59PM +0100, Alexandre Belloni wrote:
> > On 28/11/2017 at 16:01:38 +0000, James Hogan wrote:
> > > On Tue, Nov 28, 2017 at 04:26:39PM +0100, Alexandre Belloni wrote:
> > > > Introduce support for the MIPS based Microsemi Ocelot SoCs.
> > > > As the plan is to have all SoCs supported only using device tree, the
> > > > mach directory is simply called mscc.
> > >
> > > Nice. Have you considered adding this to the existing multiplatform
> > > "generic" platform? See for example commit b35565bb16a5 ("MIPS: generic:
> > > Add support for MIPSfpga") for the latest platform to be converted.
> > >
> >
> > I didn't because we are currently booting using an old redboot with its
> > own boot protocol and at boot, the register read by the sead3 code is
> > completely random (it actually matched once).
> >
> > Do you consider that mandatory to get the platform upstream?
>
> No, however if it is practical to do so I think it might be the best way
> forward (even if generic+YAMON support is mutually exclusive of
> generic+redboot, though hopefully there is some way to avoid that).
>
> Paul on Cc, he may have thoughts on this one.

We could certainly look at tightening the checks in the SEAD-3 code to
avoid the false positive.

Could you share any details of the boot protocol you're using with
redboot? One option might be for the SEAD-3 code to check that the
arguments the bootloader provided look "YAMON-like", so long as the 2
protocols differ sufficiently.

Thanks,
Paul

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