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SubjectRe: [PATCH 3/4] 44x/fsp2: tvsense workaround for dd1
Date
Again, I'm not familiar with this specific hardware so can only provide general
comments.

On Thursday, 2 November 2017 4:07:05 PM AEDT Ivan Mikhaylov wrote:
> * tvsense(temperature and voltage sensors) may provide
> erratic sense values which may result in parity errors
> on CMU.

It would be good if you could provide a more detailed description of the problem
(like in the comment below) and what this patch does to address it.

Feel free to add my reviewed by as well.

- Alistair

> Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
> ---
> arch/powerpc/platforms/44x/fsp2.c | 17 +++++++++++++++++
> 1 files changed, 17 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/platforms/44x/fsp2.c b/arch/powerpc/platforms/44x/fsp2.c
> index 9585725..4e12490 100644
> --- a/arch/powerpc/platforms/44x/fsp2.c
> +++ b/arch/powerpc/platforms/44x/fsp2.c
> @@ -59,6 +59,23 @@ static int __init fsp2_probe(void)
> mtdcr(DCRN_PLB6_HD, 0xffff0000);
> mtdcr(DCRN_PLB6_SHD, 0xffff0000);
>
> + /* TVSENSE reset is blocked (clock gated) by the POR default of the TVS
> + * sleep config bit. As a consequence, TVSENSE will provide erratic
> + * sensor values, which may result in spurious (parity) errors
> + * recorded in the CMU FIR and leading to erroneous interrupt requests
> + * once the CMU interrupt is unmasked.
> + */
> +
> + /* 1. set TVS1[UNDOZE] */
> + val = mfcmu(CMUN_TVS1);
> + val |= 0x4;
> + mtcmu(CMUN_TVS1, val);
> +
> + /* 2. clear FIR[TVS] and FIR[TVSPAR] */
> + val = mfcmu(CMUN_FIR0);
> + val |= 0x30000000;
> + mtcmu(CMUN_FIR0, val);
> +
> /* L2 machine checks */
> mtl2(L2PLBMCKEN0, 0xffffffff);
> mtl2(L2PLBMCKEN1, 0x0000ffff);
>


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