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    Subject[PATCH 02/24] x86/mm/kaiser: Prepare the x86/entry assembly code for entry/exit CR3 switching
    Date
    From: Dave Hansen <dave.hansen@linux.intel.com>

    This is largely code from Andy Lutomirski. I fixed a few bugs
    in it, and added a few SWITCH_TO_* spots.

    KAISER needs to switch to a different CR3 value when it enters
    the kernel and switch back when it exits. This essentially
    needs to be done before leaving assembly code.

    This is extra challenging because the switching context is
    tricky: the registers that can be clobbered can vary. It is also
    hard to store things on the stack because there is an established
    ABI (ptregs) or the stack is entirely unsafe to use.

    This patch establishes a set of macros that allow changing to
    the user and kernel CR3 values.

    Interactions with SWAPGS: previous versions of the KAISER code
    relied on having per-CPU scratch space to save/restore a register
    that can be used for the CR3 MOV. The %GS register is used to
    index into our per-CPU space, so SWAPGS *had* to be done before
    the CR3 switch. That scratch space is gone now, but the semantic
    that SWAPGS must be done before the CR3 MOV is retained. This is
    good to keep because it is not that hard to do and it allows us
    to do things like add per-CPU debugging information to help us
    figure out what goes wrong sometimes.

    What this does in the NMI code is worth pointing out. NMIs
    can interrupt *any* context and they can also be nested with
    NMIs interrupting other NMIs. The comments below
    ".Lnmi_from_kernel" explain the format of the stack during this
    situation. Changing the format of this stack is not a fun
    exercise: I tried. Instead of storing the old CR3 value on the
    stack, this patch depend on the *regular* register save/restore
    mechanism and then uses %r14 to keep CR3 during the NMI. It is
    callee-saved and will not be clobbered by the C NMI handlers that
    get called.

    Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    Reviewed-by: Borislav Petkov <bp@suse.de>
    Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
    Cc: Andy Lutomirski <luto@kernel.org>
    Cc: Brian Gerst <brgerst@gmail.com>
    Cc: Denys Vlasenko <dvlasenk@redhat.com>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Cc: Josh Poimboeuf <jpoimboe@redhat.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Rik van Riel <riel@redhat.com>
    Cc: daniel.gruss@iaik.tugraz.at
    Cc: hughd@google.com
    Cc: keescook@google.com
    Cc: linux-mm@kvack.org
    Cc: michael.schwarz@iaik.tugraz.at
    Cc: moritz.lipp@iaik.tugraz.at
    Cc: richard.fellner@student.tugraz.at
    Link: https://lkml.kernel.org/r/20171123003442.2D047A7D@viggo.jf.intel.com
    Signed-off-by: Ingo Molnar <mingo@kernel.org>
    ---
    arch/x86/entry/calling.h | 65 ++++++++++++++++++++++++++++++++++++++++
    arch/x86/entry/entry_64.S | 38 +++++++++++++++++++++--
    arch/x86/entry/entry_64_compat.S | 24 ++++++++++++++-
    3 files changed, 123 insertions(+), 4 deletions(-)

    diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h
    index 3fd8bc560fae..e1650da01323 100644
    --- a/arch/x86/entry/calling.h
    +++ b/arch/x86/entry/calling.h
    @@ -1,6 +1,7 @@
    /* SPDX-License-Identifier: GPL-2.0 */
    #include <linux/jump_label.h>
    #include <asm/unwind_hints.h>
    +#include <asm/cpufeatures.h>

    /*

    @@ -187,6 +188,70 @@ For 32-bit we have the following conventions - kernel is built with
    #endif
    .endm

    +#ifdef CONFIG_KAISER
    +
    +/* KAISER PGDs are 8k. Flip bit 12 to switch between the two halves: */
    +#define KAISER_SWITCH_MASK (1<<PAGE_SHIFT)
    +
    +.macro ADJUST_KERNEL_CR3 reg:req
    + /* Clear "KAISER bit", point CR3 at kernel pagetables: */
    + andq $(~KAISER_SWITCH_MASK), \reg
    +.endm
    +
    +.macro ADJUST_USER_CR3 reg:req
    + /* Move CR3 up a page to the user page tables: */
    + orq $(KAISER_SWITCH_MASK), \reg
    +.endm
    +
    +.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
    + mov %cr3, \scratch_reg
    + ADJUST_KERNEL_CR3 \scratch_reg
    + mov \scratch_reg, %cr3
    +.endm
    +
    +.macro SWITCH_TO_USER_CR3 scratch_reg:req
    + mov %cr3, \scratch_reg
    + ADJUST_USER_CR3 \scratch_reg
    + mov \scratch_reg, %cr3
    +.endm
    +
    +.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
    + movq %cr3, %r\scratch_reg
    + movq %r\scratch_reg, \save_reg
    + /*
    + * Is the switch bit zero? This means the address is
    + * up in real KAISER patches in a moment.
    + */
    + testq $(KAISER_SWITCH_MASK), %r\scratch_reg
    + jz .Ldone_\@
    +
    + ADJUST_KERNEL_CR3 %r\scratch_reg
    + movq %r\scratch_reg, %cr3
    +
    +.Ldone_\@:
    +.endm
    +
    +.macro RESTORE_CR3 save_reg:req
    + /*
    + * The CR3 write could be avoided when not changing its value,
    + * but would require a CR3 read *and* a scratch register.
    + */
    + movq \save_reg, %cr3
    +.endm
    +
    +#else /* CONFIG_KAISER=n: */
    +
    +.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
    +.endm
    +.macro SWITCH_TO_USER_CR3 scratch_reg:req
    +.endm
    +.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
    +.endm
    +.macro RESTORE_CR3 save_reg:req
    +.endm
    +
    +#endif
    +
    #endif /* CONFIG_X86_64 */

    /*
    diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
    index caf74a1bb3de..df0152bee8a8 100644
    --- a/arch/x86/entry/entry_64.S
    +++ b/arch/x86/entry/entry_64.S
    @@ -168,6 +168,9 @@ ENTRY(entry_SYSCALL_64_trampoline)
    /* Stash the user RSP. */
    movq %rsp, RSP_SCRATCH

    + /* Note: using %rsp as a scratch reg. */
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
    +
    /* Load the top of the task stack into RSP */
    movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp

    @@ -198,6 +201,14 @@ ENTRY(entry_SYSCALL_64)

    swapgs
    movq %rsp, PER_CPU_VAR(rsp_scratch)
    +
    + /*
    + * The kernel CR3 is needed to map the process stack, but we
    + * need a scratch register to be able to load CR3. %rsp is
    + * clobberable right now, so use it as a scratch register.
    + * %rsp will look crazy here for a couple instructions.
    + */
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
    movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp

    /* Construct struct pt_regs on stack */
    @@ -393,6 +404,7 @@ GLOBAL(entry_SYSCALL_64_after_hwframe)
    * We are on the trampoline stack. All regs except RDI are live.
    * We can do future final exit work right here.
    */
    + SWITCH_TO_USER_CR3 scratch_reg=%rdi

    popq %rdi
    popq %rsp
    @@ -729,6 +741,8 @@ GLOBAL(swapgs_restore_regs_and_return_to_usermode)
    * We can do future final exit work right here.
    */

    + SWITCH_TO_USER_CR3 scratch_reg=%rdi
    +
    /* Restore RDI. */
    popq %rdi
    SWAPGS
    @@ -938,6 +952,8 @@ ENTRY(switch_to_thread_stack)
    UNWIND_HINT_FUNC

    pushq %rdi
    + /* Need to switch before accessing the thread stack. */
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
    movq %rsp, %rdi
    movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
    UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
    @@ -1239,7 +1255,11 @@ ENTRY(paranoid_entry)
    js 1f /* negative -> in kernel */
    SWAPGS
    xorl %ebx, %ebx
    -1: ret
    +
    +1:
    + SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=ax save_reg=%r14
    +
    + ret
    END(paranoid_entry)

    /*
    @@ -1261,6 +1281,7 @@ ENTRY(paranoid_exit)
    testl %ebx, %ebx /* swapgs needed? */
    jnz .Lparanoid_exit_no_swapgs
    TRACE_IRQS_IRETQ
    + RESTORE_CR3 save_reg=%r14
    SWAPGS_UNSAFE_STACK
    jmp .Lparanoid_exit_restore
    .Lparanoid_exit_no_swapgs:
    @@ -1288,6 +1309,8 @@ ENTRY(error_entry)
    * from user mode due to an IRET fault.
    */
    SWAPGS
    + /* We have user CR3. Change to kernel CR3. */
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rax

    .Lerror_entry_from_usermode_after_swapgs:
    /* Put us onto the real thread stack. */
    @@ -1334,6 +1357,7 @@ ENTRY(error_entry)
    * .Lgs_change's error handler with kernel gsbase.
    */
    SWAPGS
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
    jmp .Lerror_entry_done

    .Lbstep_iret:
    @@ -1343,10 +1367,11 @@ ENTRY(error_entry)

    .Lerror_bad_iret:
    /*
    - * We came from an IRET to user mode, so we have user gsbase.
    - * Switch to kernel gsbase:
    + * We came from an IRET to user mode, so we have user
    + * gsbase and CR3. Switch to kernel gsbase and CR3:
    */
    SWAPGS
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rax

    /*
    * Pretend that the exception came from user mode: set up pt_regs
    @@ -1378,6 +1403,10 @@ END(error_exit)
    /*
    * Runs on exception stack. Xen PV does not go through this path at all,
    * so we can use real assembly here.
    + *
    + * Registers:
    + * %r14: Used to save/restore the CR3 of the interrupted context
    + * when KAISER is in use. Do not clobber.
    */
    ENTRY(nmi)
    UNWIND_HINT_IRET_REGS
    @@ -1441,6 +1470,7 @@ ENTRY(nmi)

    swapgs
    cld
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx
    movq %rsp, %rdx
    movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
    UNWIND_HINT_IRET_REGS base=%rdx offset=8
    @@ -1693,6 +1723,8 @@ ENTRY(nmi)
    movq $-1, %rsi
    call do_nmi

    + RESTORE_CR3 save_reg=%r14
    +
    testl %ebx, %ebx /* swapgs needed? */
    jnz nmi_restore
    nmi_swapgs:
    diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
    index 95ad40eb7eff..05238b29895e 100644
    --- a/arch/x86/entry/entry_64_compat.S
    +++ b/arch/x86/entry/entry_64_compat.S
    @@ -49,6 +49,10 @@
    ENTRY(entry_SYSENTER_compat)
    /* Interrupts are off on entry. */
    SWAPGS
    +
    + /* We are about to clobber %rsp anyway, clobbering here is OK */
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
    +
    movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp

    /*
    @@ -215,6 +219,12 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe)
    pushq $0 /* pt_regs->r14 = 0 */
    pushq $0 /* pt_regs->r15 = 0 */

    + /*
    + * We just saved %rdi so it is safe to clobber. It is not
    + * preserved during the C calls inside TRACE_IRQS_OFF anyway.
    + */
    + SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
    +
    /*
    * User mode is traced as though IRQs are on, and SYSENTER
    * turned them off.
    @@ -256,10 +266,22 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe)
    * when the system call started, which is already known to user
    * code. We zero R8-R10 to avoid info leaks.
    */
    + movq RSP-ORIG_RAX(%rsp), %rsp
    +
    + /*
    + * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
    + * on the process stack which is not mapped to userspace and
    + * not readable after we SWITCH_TO_USER_CR3. Delay the CR3
    + * switch until after after the last reference to the process
    + * stack.
    + *
    + * %r8 is zeroed before the sysret, thus safe to clobber.
    + */
    + SWITCH_TO_USER_CR3 scratch_reg=%r8
    +
    xorq %r8, %r8
    xorq %r9, %r9
    xorq %r10, %r10
    - movq RSP-ORIG_RAX(%rsp), %rsp
    swapgs
    sysretl
    END(entry_SYSCALL_compat)
    --
    2.14.1
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