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    Subject[PATCH 07/17] drm/sun4i: Add support for all HW supported DE2 RGB formats
    Date
    Currently only a few RGB formats are supported by the DE2 driver. Add
    support for all formats supported by the HW.

    Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
    ---
    drivers/gpu/drm/sun4i/sun8i_layer.c | 19 ++++-
    drivers/gpu/drm/sun4i/sun8i_mixer.c | 134 ++++++++++++++++++++++++++++--------
    drivers/gpu/drm/sun4i/sun8i_mixer.h | 17 +++++
    3 files changed, 139 insertions(+), 31 deletions(-)

    diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c b/drivers/gpu/drm/sun4i/sun8i_layer.c
    index 371d6b359262..49ccdd0149bd 100644
    --- a/drivers/gpu/drm/sun4i/sun8i_layer.c
    +++ b/drivers/gpu/drm/sun4i/sun8i_layer.c
    @@ -89,8 +89,25 @@ static const struct drm_plane_funcs sun8i_mixer_layer_funcs = {
    };

    static const uint32_t sun8i_mixer_layer_formats[] = {
    - DRM_FORMAT_RGB888,
    + DRM_FORMAT_ABGR1555,
    + DRM_FORMAT_ABGR4444,
    + DRM_FORMAT_ABGR8888,
    + DRM_FORMAT_ARGB1555,
    + DRM_FORMAT_ARGB4444,
    DRM_FORMAT_ARGB8888,
    + DRM_FORMAT_BGR565,
    + DRM_FORMAT_BGR888,
    + DRM_FORMAT_BGRA5551,
    + DRM_FORMAT_BGRA4444,
    + DRM_FORMAT_BGRA8888,
    + DRM_FORMAT_BGRX8888,
    + DRM_FORMAT_RGB565,
    + DRM_FORMAT_RGB888,
    + DRM_FORMAT_RGBA4444,
    + DRM_FORMAT_RGBA5551,
    + DRM_FORMAT_RGBA8888,
    + DRM_FORMAT_RGBX8888,
    + DRM_FORMAT_XBGR8888,
    DRM_FORMAT_XRGB8888,
    };

    diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
    index c1b7685603fe..fe81c048cc08 100644
    --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
    +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
    @@ -29,6 +29,105 @@
    #include "sun8i_layer.h"
    #include "sunxi_engine.h"

    +struct de2_fmt_info {
    + u32 drm_fmt;
    + u32 de2_fmt;
    +};
    +
    +static const struct de2_fmt_info de2_formats[] = {
    + {
    + .drm_fmt = DRM_FORMAT_ARGB8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_ARGB8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_ABGR8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_ABGR8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_RGBA8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_RGBA8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_BGRA8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_BGRA8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_XRGB8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_XRGB8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_XBGR8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_XBGR8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_RGBX8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_RGBX8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_BGRX8888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_BGRX8888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_RGB888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_RGB888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_BGR888,
    + .de2_fmt = SUN8I_MIXER_FBFMT_BGR888,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_RGB565,
    + .de2_fmt = SUN8I_MIXER_FBFMT_RGB565,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_BGR565,
    + .de2_fmt = SUN8I_MIXER_FBFMT_BGR565,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_ARGB4444,
    + .de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_ABGR4444,
    + .de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_RGBA4444,
    + .de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_BGRA4444,
    + .de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_ARGB1555,
    + .de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_ABGR1555,
    + .de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_RGBA5551,
    + .de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551,
    + },
    + {
    + .drm_fmt = DRM_FORMAT_BGRA5551,
    + .de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551,
    + },
    +};
    +
    +static const struct de2_fmt_info *sun8i_mixer_format_info(u32 format)
    +{
    + unsigned int i;
    +
    + for (i = 0; i < ARRAY_SIZE(de2_formats); ++i)
    + if (de2_formats[i].drm_fmt == format)
    + return &de2_formats[i];
    +
    + return NULL;
    +}
    +
    static void sun8i_mixer_commit(struct sunxi_engine *engine)
    {
    DRM_DEBUG_DRIVER("Committing changes\n");
    @@ -63,29 +162,6 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
    SUN8I_MIXER_BLEND_PIPE_CTL_EN(layer), val);
    }

    -static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane,
    - u32 format, u32 *mode)
    -{
    - switch (format) {
    - case DRM_FORMAT_ARGB8888:
    - *mode = SUN8I_MIXER_FBFMT_ARGB8888;
    - break;
    -
    - case DRM_FORMAT_XRGB8888:
    - *mode = SUN8I_MIXER_FBFMT_XRGB8888;
    - break;
    -
    - case DRM_FORMAT_RGB888:
    - *mode = SUN8I_MIXER_FBFMT_RGB888;
    - break;
    -
    - default:
    - return -EINVAL;
    - }
    -
    - return 0;
    -}
    -
    int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer,
    int layer, struct drm_plane *plane)
    {
    @@ -158,18 +234,16 @@ int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer,
    int layer, struct drm_plane *plane)
    {
    struct drm_plane_state *state = plane->state;
    - struct drm_framebuffer *fb = state->fb;
    + const struct de2_fmt_info *fmt_info;
    u32 val;
    - int ret;

    - ret = sun8i_mixer_drm_format_to_layer(plane, fb->format->format,
    - &val);
    - if (ret) {
    + fmt_info = sun8i_mixer_format_info(state->fb->format->format);
    + if (!fmt_info) {
    DRM_DEBUG_DRIVER("Invalid format\n");
    - return ret;
    + return -EINVAL;
    }

    - val <<= SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
    + val = fmt_info->de2_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
    regmap_update_bits(mixer->engine.regs,
    SUN8I_MIXER_CHAN_UI_LAYER_ATTR(layer, 0),
    SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
    diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
    index 76f0b2bd91e2..caebd9cc550f 100644
    --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
    +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
    @@ -82,8 +82,25 @@
    #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24)

    #define SUN8I_MIXER_FBFMT_ARGB8888 0
    +#define SUN8I_MIXER_FBFMT_ABGR8888 1
    +#define SUN8I_MIXER_FBFMT_RGBA8888 2
    +#define SUN8I_MIXER_FBFMT_BGRA8888 3
    #define SUN8I_MIXER_FBFMT_XRGB8888 4
    +#define SUN8I_MIXER_FBFMT_XBGR8888 5
    +#define SUN8I_MIXER_FBFMT_RGBX8888 6
    +#define SUN8I_MIXER_FBFMT_BGRX8888 7
    #define SUN8I_MIXER_FBFMT_RGB888 8
    +#define SUN8I_MIXER_FBFMT_BGR888 9
    +#define SUN8I_MIXER_FBFMT_RGB565 10
    +#define SUN8I_MIXER_FBFMT_BGR565 11
    +#define SUN8I_MIXER_FBFMT_ARGB4444 12
    +#define SUN8I_MIXER_FBFMT_ABGR4444 13
    +#define SUN8I_MIXER_FBFMT_RGBA4444 14
    +#define SUN8I_MIXER_FBFMT_BGRA4444 15
    +#define SUN8I_MIXER_FBFMT_ARGB1555 16
    +#define SUN8I_MIXER_FBFMT_ABGR1555 17
    +#define SUN8I_MIXER_FBFMT_RGBA5551 18
    +#define SUN8I_MIXER_FBFMT_BGRA5551 19

    /*
    * These sub-engines are still unknown now, the EN registers are here only to
    --
    2.15.0
    \
     
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      Last update: 2017-11-27 22:18    [W:2.362 / U:0.128 seconds]
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