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SubjectRe: [PATCH v3 05/16] iommu/vt-d: support flushing more TLB types
On Mon, 20 Nov 2017 14:20:31 +0000
"Lukoshkov, Maksim" <maksim.lukoshkov@intel.com> wrote:

> On 11/17/2017 18:55, Jacob Pan wrote:
> > +void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16
> > pfsid,
> > + u16 qdep, u64 addr, unsigned mask)
> > +{
> > + struct qi_desc desc;
> > +
> > + pr_debug_ratelimited("%s: sid %d, pfsid %d, qdep %d, addr
> > %llx, mask %d\n",
> > + __func__, sid, pfsid, qdep, addr, mask);
> > if (mask) {
> > BUG_ON(addr & ((1 << (VTD_PAGE_SHIFT + mask)) -
> > 1)); addr |= (1ULL << (VTD_PAGE_SHIFT + mask - 1)) - 1;
> > @@ -1352,7 +1366,41 @@ void qi_flush_dev_iotlb(struct intel_iommu
> > *iommu, u16 sid, u16 qdep, qdep = 0;
> >
> > desc.low = QI_DEV_IOTLB_SID(sid) |
> > QI_DEV_IOTLB_QDEP(qdep) |
> > - QI_DIOTLB_TYPE;
> > + QI_DIOTLB_TYPE | QI_DEV_IOTLB_SID(pfsid);
>
> QI_DEV_IOTLB_SID(pfsid) -> QI_DEV_EIOTLB_PFSID(pfsid)?
>
good catch! thank you.
> > +
> > + qi_submit_sync(&desc, iommu);
> > +}
> > +
>
> Regards,
> Maksim Lukoshkov

[Jacob Pan]

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