Messages in this thread | | | Subject | Re: [PATCH v2 1/2] pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC | From | Jerome Brunet <> | Date | Mon, 20 Nov 2017 11:33:11 +0100 |
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On Mon, 2017-11-20 at 18:08 +0800, Yixun Lan wrote: > From: Xingyu Chen <xingyu.chen@amlogic.com> > > The pin controller has been updated in the Amlogic Meson AXG series, > which use continuous 4-bit register to select function for each pin. > In order to support this, a new pinmux operations "meson_axg_pmx_ops" > has been added. > > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
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