Messages in this thread |  | | From | Milind Chabbi <> | | Date | Sun, 12 Nov 2017 11:09:23 -0800 | | Subject | Re: [PATCH] perf/core: fast breakpoint modification via _IOC_MODIFY_BREAKPOINT |
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On Thu, Nov 9, 2017 at 10:59 AM, Milind Chabbi <chabbi.milind@gmail.com> wrote: > SNIP > > On Thu, Nov 9, 2017 at 5:12 AM, Jiri Olsa <jolsa@redhat.com> wrote: >> >> >> how about something like below (untested) >> >> looks like there's no irq caller for modify_user_hw_breakpoint, >> so we should be fine with locking nr_bp_mutex >> >> jirka >> >> >> --- >> diff --git a/kernel/events/hw_breakpoint.c b/kernel/events/hw_breakpoint.c >> index 3f8cb1e14588..f062b68399ea 100644 >> --- a/kernel/events/hw_breakpoint.c >> +++ b/kernel/events/hw_breakpoint.c >> @@ -448,6 +448,8 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att >> else >> perf_event_disable(bp); >> >> + release_bp_slot(bp); >> + >> bp->attr.bp_addr = attr->bp_addr; >> bp->attr.bp_type = attr->bp_type; >> bp->attr.bp_len = attr->bp_len; >> @@ -455,9 +457,9 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att >> if (attr->disabled) >> goto end; >> >> - err = validate_hw_breakpoint(bp); >> + err = reserve_bp_slot(bp); >> if (!err) >> - perf_event_enable(bp); >> + err = validate_hw_breakpoint(bp); >> >> if (err) { >> bp->attr.bp_addr = old_addr; >> @@ -469,6 +471,7 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att >> return err; >> } >> >> + perf_event_enable(bp); >> end: >> bp->attr.disabled = attr->disabled; >> > > We can do this accounting only if bp->attr.bp_type != attr->bp_type. > > -Milind
Jirka,
Neither of us seems to fully understand the convoluted logic used in breakpoint counting.
I tested the following sequence on an x86 machine, which has four debug registers (without your suggested patch for counting correction).
fd1 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR1 fd2 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR2 fd3 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR3 fd4 = perf_event_open(...); //BP_TYPE= HW_BREAKPOINT_RW @ ADDR4 ioctl(fd4, MODIFY, ...); // change fd4 to BP_TYPE= HW_BREAKPOINT_X @ ADDR5 close(fd4); fd5 = perf_event_open(); //BP_TYPE=RW @ ADDR6
We expected fd5 to fail because four BP_TYPE=TYPE_DATA are in use as per the accounting, but in reality, fd5 was successfully opened.
Is the accounting accidentally working on x86? Is there another architecture where TYPE_DATA and TYPE_INS are counted differently?
-Milind
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