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SubjectRe: [Patch 4/6] dt-bindings: media: ti-vpe: Document VPE driver
On Wed, Oct 18, 2017 at 8:02 AM, Benoit Parrot <bparrot@ti.com> wrote:
> Rob Herring <robh@kernel.org> wrote on Tue [2017-Oct-17 16:00:51 -0500]:
>> On Thu, Oct 12, 2017 at 02:27:17PM -0500, Benoit Parrot wrote:
>> > Device Tree bindings for the Video Processing Engine (VPE) driver.
>> >
>> > Signed-off-by: Benoit Parrot <bparrot@ti.com>
>> > ---
>> > Documentation/devicetree/bindings/media/ti-vpe.txt | 41 ++++++++++++++++++++++
>> > 1 file changed, 41 insertions(+)
>> > create mode 100644 Documentation/devicetree/bindings/media/ti-vpe.txt
>> >
>> > diff --git a/Documentation/devicetree/bindings/media/ti-vpe.txt b/Documentation/devicetree/bindings/media/ti-vpe.txt
>> > new file mode 100644
>> > index 000000000000..c2ef93d08417
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/media/ti-vpe.txt
>> > @@ -0,0 +1,41 @@
>> > +Texas Instruments DRA7x VIDEO PROCESSING ENGINE (VPE)
>> > +------------------------------------------------------
>> > +
>> > +The Video Processing Engine (VPE) is a key component for image post
>> > +processing applications. VPE consist of a single memory to memory
>> > +path which can perform chroma up/down sampling, deinterlacing,
>> > +scaling and color space conversion.
>> > +
>> > +Required properties:
>> > +- compatible: must be "ti,vpe"
>>
>> Needs SoC specific compatibles.
>
> This particular I/P is present on all DRA7x family of devices
> so would "ti,dra7-vpe" be acceptable?

Better, but it's proven not to be in other cases IIRC. I'll leave it
to TI maintainers to decide.

>> > +- reg: physical base address and length of the registers set for the 8
>> > + memory regions required;
>> > +- reg-names: name associated with the memory regions described is <reg>;
>> > +- interrupts: should contain IRQ line for VPE;
>> > +
>> > +Example:
>> > + vpe {
>> > + compatible = "ti,vpe";
>> > + ti,hwmods = "vpe";
>> > + clocks = <&dpll_core_h23x2_ck>;
>> > + clock-names = "fck";
>> > + reg = <0x489d0000 0x120>,
>> > + <0x489d0300 0x20>,
>> > + <0x489d0400 0x20>,
>> > + <0x489d0500 0x20>,
>> > + <0x489d0600 0x3c>,
>> > + <0x489d0700 0x80>,
>>
>> Is there other stuff between these regions?
>
> No, they listed separately because each sub-region/module is
> individually mapped and accessed using a starting 0 offset.

So you are going to use 48KB of virtual memory to map 2KB of
registers? Because each ioremap uses 8KB (1 page plus 1 guard page)
last time i looked (which has been a while).

But it's your platform.

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