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    Subject[PATCH 4.13 05/53] dmaengine: edma: Align the memcpy acnt array size with the transfer
    Date
    4.13-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Peter Ujfalusi <peter.ujfalusi@ti.com>

    commit 87a2f622cc6446c7d09ac655b7b9b04886f16a4c upstream.

    Memory to Memory transfers does not have any special alignment needs
    regarding to acnt array size, but if one of the areas are in memory mapped
    regions (like PCIe memory), we need to make sure that the acnt array size
    is aligned with the mem copy parameters.

    Before "dmaengine: edma: Optimize memcpy operation" change the memcpy was set
    up in a different way: acnt == number of bytes in a word based on
    __ffs((src | dest | len), bcnt and ccnt for looping the necessary number of
    words to comlete the trasnfer.

    Instead of reverting the commit we can fix it to make sure that the ACNT size
    is aligned to the traswnfer.

    Fixes: df6694f80365a (dmaengine: edma: Optimize memcpy operation)
    Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
    Signed-off-by: Vinod Koul <vinod.koul@intel.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/dma/edma.c | 19 ++++++++++++++++---
    1 file changed, 16 insertions(+), 3 deletions(-)

    --- a/drivers/dma/edma.c
    +++ b/drivers/dma/edma.c
    @@ -1143,11 +1143,24 @@ static struct dma_async_tx_descriptor *e
    struct edma_desc *edesc;
    struct device *dev = chan->device->dev;
    struct edma_chan *echan = to_edma_chan(chan);
    - unsigned int width, pset_len;
    + unsigned int width, pset_len, array_size;

    if (unlikely(!echan || !len))
    return NULL;

    + /* Align the array size (acnt block) with the transfer properties */
    + switch (__ffs((src | dest | len))) {
    + case 0:
    + array_size = SZ_32K - 1;
    + break;
    + case 1:
    + array_size = SZ_32K - 2;
    + break;
    + default:
    + array_size = SZ_32K - 4;
    + break;
    + }
    +
    if (len < SZ_64K) {
    /*
    * Transfer size less than 64K can be handled with one paRAM
    @@ -1169,7 +1182,7 @@ static struct dma_async_tx_descriptor *e
    * When the full_length is multibple of 32767 one slot can be
    * used to complete the transfer.
    */
    - width = SZ_32K - 1;
    + width = array_size;
    pset_len = rounddown(len, width);
    /* One slot is enough for lengths multiple of (SZ_32K -1) */
    if (unlikely(pset_len == len))
    @@ -1217,7 +1230,7 @@ static struct dma_async_tx_descriptor *e
    }
    dest += pset_len;
    src += pset_len;
    - pset_len = width = len % (SZ_32K - 1);
    + pset_len = width = len % array_size;

    ret = edma_config_pset(chan, &edesc->pset[1], src, dest, 1,
    width, pset_len, DMA_MEM_TO_MEM);

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