Messages in this thread | | | Date | Mon, 30 Jan 2017 11:20:25 +0100 (CET) | From | Thomas Gleixner <> | Subject | Re: [3/8] x86/tsc: Store and check TSC ADJUST MSR |
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Henning,
On Fri, 27 Jan 2017, Henning Schild wrote: > > did you by any chance look into TSC synchronization by adjusting the > absolute value (MSR_IA32_TSC) as well? As far as i have seen Linux did > that a long time ago and eventually it was stopped because it caused more > harm than good.
I was involved in both developing the TSC sync patches and ripping them out again.
The problem with writing TSC directly is that you really _CANNOT_ reliably handle run-time differences and SMI/NMI induced deltas. With the adjust MRS it's a halfways sane thing to do, except for the brokeness of that botch job vs. the TSC deadline timer.
> The ADJUST MSR offers an easy way to synchronize, still taking care of > all the special cases resulted in an 8-patch series. Synching without > that using the absolute value is likely much harder, but that series > might be a good foundation.
I'm not even thinking about bringing the pure TSC based sync back.
> The big question is whether we can rely on all future CPUs to > support that MSR. Do "new MSRs" disappear again at some point? If we > can not rely on the ADJUST MSR, now might be a good time to revisit the > idea of synching the absolute values.
There is nothing you can ever be sure about, but I doubt that the ADJUST MSR is going to vanish.
> I remember having read somewhere that this series might get backported > to longterm kernels, what is the status on that?
No idea.
Thanks,
tglx
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