Messages in this thread | | | Subject | Re: [PATCH v4] sparc64: Multi-page size support | From | Nitin Gupta <> | Date | Tue, 3 Jan 2017 17:22:39 -0800 |
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On 12/27/2016 09:34 AM, David Miller wrote: > From: Nitin Gupta <nitin.m.gupta@oracle.com> > Date: Tue, 13 Dec 2016 10:03:18 -0800 > >> +static unsigned int sun4u_huge_tte_to_shift(pte_t entry) >> +{ >> + unsigned long tte_szbits = pte_val(entry) & _PAGE_SZALL_4V; >> + unsigned int shift; >> + >> + switch (tte_szbits) { >> + case _PAGE_SZ256MB_4U: >> + shift = HPAGE_256MB_SHIFT; >> + break; > > You added all the code necessary to do this on the sun4u chips that support > 256MB TTEs, so you might as well enable it in the initialization code. > > I'm pretty sure this is an UltraSPARC-IV and later feature. >
I added sun4u related changes just for completeness sake. I don't have access to a sun4u machine so can't be sure if sun4u would work. That's why that _PAGE_SZALL_4V typo escaped my notice.
I will enable setup_hugepagesz() for non-hypervisor case and send a v5.
Thanks, Nitin
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