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SubjectRe: [PATCH net-next v2] macb: Common code to enable ptp support for MACB/GEM
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Le 27/01/2017 à 06:42, Harini Katakam a écrit :
> Hi Rafal,
>
> On Thu, Jan 26, 2017 at 8:45 PM, Rafal Ozieblo <rafalo@cadence.com> wrote:
>>> -----Original Message-----
>>> From: Andrei Pistirica [mailto:andrei.pistirica@microchip.com]
>>> Sent: 19 stycznia 2017 16:56
>>> Subject: [PATCH net-next v2] macb: Common code to enable ptp support for MACB/GEM
>>>
>>>
>>> +static inline bool gem_has_ptp(struct macb *bp)
>>> +{
>>> + return !!(bp->caps & MACB_CAPS_GEM_HAS_PTP);
>>> +}
>> Why don't you use hardware capabilities here? Would it be better to read it from hardware instead adding it to many configuration?
>
> If you are referring to TSU bit in DCFG5, then we will be relying on
> Cadence IP's information irrespective of the SoC capability
> and whether the PTP support was adequate.
> I think the capability approach gives better control and
> it is not really much to add.

Yes, absolutely. In fact we already had this discussion and decided that
this capability scheme was giving much more control at low cost.

Regards,
--
Nicolas Ferre

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