Messages in this thread | | | Subject | Re: [PATCH 2/7] ARM: Add Broadcom Brahma-B15 readahead cache support | From | Florian Fainelli <> | Date | Wed, 18 Jan 2017 16:18:33 -0800 |
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On 01/18/2017 02:56 PM, Russell King - ARM Linux wrote: > On Wed, Jan 18, 2017 at 12:29:21PM -0800, Florian Fainelli wrote: >> The readahead cache only intercepts reads, not writes, as such, some >> data can remain stale in any of its buffers, such that we need to flush >> it, which is an operation that needs to happen in a particular order: >> >> - disable the readahead cache >> - flush it >> - call the appropriate cache-v7.S function >> - re-enable > > I really do hope that the above explanation is wrong, because if that's > really how it's implemented, it's going to cause coherency problems. > > It's got to at least monitor writes, otherwise how do you guarantee > that the CPU doesn't see stale data? IOW:
Yes, it does monitor writes, the explanation given here was wrong. Thanks!
> > Consider this at the L2 memory-side interface (iow, downstream of the > point-of-coherency): > > CPU1 CPU2 Read-ahead buffer > read cache line C > reads cache line C and C+1 > writes cache line C+1 > read cache line C+1 > > What ensures that CPU2 sees the written out cache line from CPU1? -- Florian
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