Messages in this thread | | | Subject | Re: [PATCH 2/2] phy: msm8996-pcie-phy: Add support to msm8996 pcie phy | From | Srinivas Kandagatla <> | Date | Fri, 16 Sep 2016 17:49:18 +0100 |
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On 16/09/16 15:14, Stanimir Varbanov wrote: >> > + writel_relaxed(0x0f, base + QSERDES_COM_BG_TRIM); >> > + writel_relaxed(0x0f, base + QSERDES_COM_PLL_IVCO); >> > + writel_relaxed(0x19, base + QSERDES_COM_CLK_EP_DIV); >> > + writel_relaxed(0x10, base + QSERDES_COM_CLK_ENABLE1); >> > + writel_relaxed(0x00, base + QSERDES_COM_HSCLK_SEL); >> > + writel_relaxed(0x40, base + QSERDES_COM_RESCODE_DIV_NUM); >> > + writel_relaxed(0x00, base + PCIE_COM_SW_RESET); >> > + writel_relaxed(0x03, base + PCIE_COM_START_CONTROL); > I'd make an array with register/value pair and write the registers with > a for () loop. IMO it will be more readable. > > Probably 3 arrays - power_on, power_on_common and power_off. Thats good idea, I will keep that in mind before sending next version with common phy driver for USB/PCIE/UFS.
thanks srini
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