lkml.org 
[lkml]   [2016]   [Sep]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH 2/2] phy: msm8996-pcie-phy: Add support to msm8996 pcie phy
From
Date


On 16/09/16 15:14, Stanimir Varbanov wrote:
>> > + writel_relaxed(0x0f, base + QSERDES_COM_BG_TRIM);
>> > + writel_relaxed(0x0f, base + QSERDES_COM_PLL_IVCO);
>> > + writel_relaxed(0x19, base + QSERDES_COM_CLK_EP_DIV);
>> > + writel_relaxed(0x10, base + QSERDES_COM_CLK_ENABLE1);
>> > + writel_relaxed(0x00, base + QSERDES_COM_HSCLK_SEL);
>> > + writel_relaxed(0x40, base + QSERDES_COM_RESCODE_DIV_NUM);
>> > + writel_relaxed(0x00, base + PCIE_COM_SW_RESET);
>> > + writel_relaxed(0x03, base + PCIE_COM_START_CONTROL);
> I'd make an array with register/value pair and write the registers with
> a for () loop. IMO it will be more readable.
>
> Probably 3 arrays - power_on, power_on_common and power_off.
Thats good idea, I will keep that in mind before sending next version
with common phy driver for USB/PCIE/UFS.

thanks
srini

\
 
 \ /
  Last update: 2016-09-17 09:59    [W:0.545 / U:0.080 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site