Messages in this thread | | | Subject | Re: [RFC PATCH V2 3/3] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers | From | Dongdong Liu <> | Date | Thu, 1 Sep 2016 10:16:02 +0800 |
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在 2016/8/31 19:48, Arnd Bergmann 写道: > On Wednesday, August 31, 2016 7:48:14 PM CEST Dongdong Liu wrote: >> +static struct hisi_rc_res rc_res[] = { >> + { >> + HIP05, >> + { >> + DEFINE_RES_MEM(0xb0070000, SZ_4K), >> + DEFINE_RES_MEM(0xb0080000, SZ_4K), >> + DEFINE_RES_MEM(0xb0090000, SZ_4K), >> + DEFINE_RES_MEM(0xb00a0000, SZ_4K) >> + } >> + }, >> + { >> + HIP06, >> + { >> + DEFINE_RES_MEM(0xa0090000, SZ_4K), >> + DEFINE_RES_MEM(0xa0200000, SZ_4K), >> + DEFINE_RES_MEM(0xa00a0000, SZ_4K), >> + DEFINE_RES_MEM(0xa00b0000, SZ_4K) >> + } >> + }, >> + { >> + HIP07, >> + { >> + DEFINE_RES_MEM(0xa0090000, SZ_4K), >> + DEFINE_RES_MEM(0xa0200000, SZ_4K), >> + DEFINE_RES_MEM(0xa00a0000, SZ_4K), >> + DEFINE_RES_MEM(0xa00b0000, SZ_4K), >> + DEFINE_RES_MEM(0x8a0090000UL, SZ_4K), >> + DEFINE_RES_MEM(0x8a0200000UL, SZ_4K), >> + DEFINE_RES_MEM(0x8a00a0000UL, SZ_4K), >> + DEFINE_RES_MEM(0x8a00b0000UL, SZ_4K), >> + DEFINE_RES_MEM(0x600a0090000UL, SZ_4K), >> + DEFINE_RES_MEM(0x600a0200000UL, SZ_4K), >> + DEFINE_RES_MEM(0x600a00a0000UL, SZ_4K), >> + DEFINE_RES_MEM(0x600a00b0000UL, SZ_4K), >> + DEFINE_RES_MEM(0x700a0090000UL, SZ_4K), >> + DEFINE_RES_MEM(0x700a0200000UL, SZ_4K), >> + DEFINE_RES_MEM(0x700a00a0000UL, SZ_4K), >> + DEFINE_RES_MEM(0x700a00b0000UL, SZ_4K) >> + } >> + }, > > I don't know much about ACPI, but I'm pretty sure this is not > the normal way to find MMIO resources. Why not read them from > the ACPI tables? >
Hi Arnd
Our host bridge is non ECAM only for the RC bus config space; for any other bus underneath the root bus we support ECAM access.
We have not found a comfortable ACPI way to describle RC itself config (not ECAM) resource .
Thanks Dongdong
> Arnd > > . >
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