Messages in this thread | | | From | Wanpeng Li <> | Date | Wed, 17 Aug 2016 16:42:36 +0800 | Subject | Re: [PATCH v3 05/13] sched: Introduce SD_ASYM_CPUCAPACITY sched_domain topology flag |
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2016-07-25 21:34 GMT+08:00 Morten Rasmussen <morten.rasmussen@arm.com>: > Add a topology flag to the sched_domain hierarchy indicating the lowest > domain level where the full range of cpu capacities is represented by > the domain members for asymmetric capacity topologies (e.g. ARM > big.LITTLE). > > The flag is intended to indicate that extra care should be taken when > placing tasks on cpus and this level spans all the different types of > cpus found in the system (no need to look further up the domain > hierarchy). This information is currently only available through > iterating through the capacities of all the cpus at parent levels in the > sched_domain hierarchy. > > SD 2 [ 0 1 2 3] SD_ASYM_CPUCAPACITY > > SD 1 [ 0 1] [ 2 3] !SD_ASYM_CPUCAPACITY > > cpu: 0 1 2 3 > capacity: 756 756 1024 1024 > > If the topology in the example above is duplicated to create an eight > cpu example with third sched_domain level on top (SD 3), this level > should not have the flag set (!SD_ASYM_CPUCAPACITY) as its two group > would both have all cpu capacities represented within them.
I didn't find the place where set SD_ASYM_CPUCAPACITY to any SDs in this patchset, but you have testing result in cover letter, where I miss?
Regards, Wanpeng Li
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