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SubjectRe: [PATCH v5 3/3] locking/mutex: Ensure forward progress of waiter-spinner
Hi Waiman,

[auto build test ERROR on tip/locking/core]
[also build test ERROR on v4.8-rc1 next-20160809]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Waiman-Long/locking-mutex-Enable-optimistic-spinning-of-lock-waiter/20160811-074736
config: arm-multi_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 5.4.0-6) 5.4.0 20160609
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm

All error/warnings (new ones prefixed by >>):

In file included from arch/arm/include/asm/bitops.h:28:0,
from include/linux/bitops.h:36,
from include/linux/kernel.h:10,
from include/asm-generic/bug.h:13,
from arch/arm/include/asm/bug.h:59,
from include/linux/bug.h:4,
from include/linux/thread_info.h:11,
from include/asm-generic/current.h:4,
from ./arch/arm/include/generated/asm/current.h:1,
from include/linux/mutex.h:13,
from kernel/locking/mutex.c:20:
kernel/locking/mutex.c: In function 'mutex_optimistic_spin':
>> arch/arm/include/asm/barrier.h:18:21: error: expected expression before '__asm__'
#define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory")
^
>> arch/arm/include/asm/barrier.h:61:20: note: in expansion of macro 'dmb'
#define __smp_mb() dmb(ish)
^
>> include/asm-generic/barrier.h:76:18: note: in expansion of macro '__smp_mb'
#define smp_mb() __smp_mb()
^
>> arch/arm/include/asm/processor.h:80:23: note: in expansion of macro 'smp_mb'
#define cpu_relax() smp_mb()
^
arch/arm/include/asm/processor.h:85:47: note: in expansion of macro 'cpu_relax'
#define cpu_relax_lowlatency() cpu_relax()
^
kernel/locking/mutex.c:355:10: note: in expansion of macro 'cpu_relax_lowlatency'
for (;; cpu_relax_lowlatency()) {
^

vim +/__asm__ +18 arch/arm/include/asm/barrier.h

9f97da78b David Howells 2012-03-28 12 #define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
9f97da78b David Howells 2012-03-28 13 #endif
9f97da78b David Howells 2012-03-28 14
9f97da78b David Howells 2012-03-28 15 #if __LINUX_ARM_ARCH__ >= 7
3ea128065 Will Deacon 2013-05-10 16 #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory")
3ea128065 Will Deacon 2013-05-10 17 #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory")
3ea128065 Will Deacon 2013-05-10 @18 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory")
9f97da78b David Howells 2012-03-28 19 #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
3ea128065 Will Deacon 2013-05-10 20 #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
9f97da78b David Howells 2012-03-28 21 : : "r" (0) : "memory")
3ea128065 Will Deacon 2013-05-10 22 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
9f97da78b David Howells 2012-03-28 23 : : "r" (0) : "memory")
3ea128065 Will Deacon 2013-05-10 24 #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
9f97da78b David Howells 2012-03-28 25 : : "r" (0) : "memory")
9f97da78b David Howells 2012-03-28 26 #elif defined(CONFIG_CPU_FA526)
3ea128065 Will Deacon 2013-05-10 27 #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
9f97da78b David Howells 2012-03-28 28 : : "r" (0) : "memory")
3ea128065 Will Deacon 2013-05-10 29 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
9f97da78b David Howells 2012-03-28 30 : : "r" (0) : "memory")
3ea128065 Will Deacon 2013-05-10 31 #define dmb(x) __asm__ __volatile__ ("" : : : "memory")
9f97da78b David Howells 2012-03-28 32 #else
3ea128065 Will Deacon 2013-05-10 33 #define isb(x) __asm__ __volatile__ ("" : : : "memory")
3ea128065 Will Deacon 2013-05-10 34 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
9f97da78b David Howells 2012-03-28 35 : : "r" (0) : "memory")
3ea128065 Will Deacon 2013-05-10 36 #define dmb(x) __asm__ __volatile__ ("" : : : "memory")
9f97da78b David Howells 2012-03-28 37 #endif
9f97da78b David Howells 2012-03-28 38
f81309067 Russell King 2015-06-01 39 #ifdef CONFIG_ARM_HEAVY_MB
4e1f8a6f1 Russell King 2015-06-03 40 extern void (*soc_mb)(void);
f81309067 Russell King 2015-06-01 41 extern void arm_heavy_mb(void);
f81309067 Russell King 2015-06-01 42 #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0)
f81309067 Russell King 2015-06-01 43 #else
f81309067 Russell King 2015-06-01 44 #define __arm_heavy_mb(x...) dsb(x)
f81309067 Russell King 2015-06-01 45 #endif
f81309067 Russell King 2015-06-01 46
520319de0 Masahiro Yamada 2016-06-21 47 #if defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
f81309067 Russell King 2015-06-01 48 #define mb() __arm_heavy_mb()
9f97da78b David Howells 2012-03-28 49 #define rmb() dsb()
f81309067 Russell King 2015-06-01 50 #define wmb() __arm_heavy_mb(st)
1077fa36f Alexander Duyck 2014-12-11 51 #define dma_rmb() dmb(osh)
1077fa36f Alexander Duyck 2014-12-11 52 #define dma_wmb() dmb(oshst)
9f97da78b David Howells 2012-03-28 53 #else
48aa820f1 Rob Herring 2012-08-21 54 #define mb() barrier()
48aa820f1 Rob Herring 2012-08-21 55 #define rmb() barrier()
48aa820f1 Rob Herring 2012-08-21 56 #define wmb() barrier()
1077fa36f Alexander Duyck 2014-12-11 57 #define dma_rmb() barrier()
1077fa36f Alexander Duyck 2014-12-11 58 #define dma_wmb() barrier()
9f97da78b David Howells 2012-03-28 59 #endif
9f97da78b David Howells 2012-03-28 60
2b1f3de10 Michael S. Tsirkin 2015-12-27 @61 #define __smp_mb() dmb(ish)
2b1f3de10 Michael S. Tsirkin 2015-12-27 62 #define __smp_rmb() __smp_mb()
2b1f3de10 Michael S. Tsirkin 2015-12-27 63 #define __smp_wmb() dmb(ishst)
9f97da78b David Howells 2012-03-28 64

:::::: The code at line 18 was first introduced by commit
:::::: 3ea128065ed20d33bd02ff6dab689f88e38000be ARM: barrier: allow options to be passed to memory barrier instructions

:::::: TO: Will Deacon <will.deacon@arm.com>
:::::: CC: Will Deacon <will.deacon@arm.com>

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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