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SubjectRe: [PATCH V2 3/3] perf tools: adding coresight etm PMU record capabilities
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On 14/07/16 21:35, Mathieu Poirier wrote:
> Coresight ETMs are IP blocks used to perform HW assisted tracing
> on a CPU core. This patch introduce the required auxiliary API
> functions allowing the perf core to interact with a tracer.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>


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