Messages in this thread Patch in this message |  | | Date | Sun, 10 Jul 2016 11:12:03 -0700 | From | tip-bot for Len Brown <> | Subject | [tip:x86/timers] x86/tsc_msr: Add Airmont reference clock values |
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Commit-ID: 6fcb41cdaee5056c96de88ee095bddd27a7697de Gitweb: http://git.kernel.org/tip/6fcb41cdaee5056c96de88ee095bddd27a7697de Author: Len Brown <len.brown@intel.com> AuthorDate: Fri, 17 Jun 2016 01:22:48 -0400 Committer: Ingo Molnar <mingo@kernel.org> CommitDate: Sun, 10 Jul 2016 17:00:13 +0200
x86/tsc_msr: Add Airmont reference clock values
per the Intel 64 and IA-32 Architecture Software Developer's Manual...
Add the reference clock for Intel Atom Processors Based on the Airmont Microarchitecture.
Reported-by: Stephane Gasparini <stephane.gasparini@intel.com> Signed-off-by: Len Brown <len.brown@intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/abc6a0f4b18281410da1a3f26e2819d8e03e144f.1466138954.git.len.brown@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org> --- arch/x86/kernel/tsc_msr.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 20487e2..65b3d8cb 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -13,7 +13,7 @@ #include <asm/apic.h> #include <asm/param.h> -#define MAX_NUM_FREQS 8 +#define MAX_NUM_FREQS 9 /* * If MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be @@ -40,6 +40,9 @@ static struct freq_desc freq_desc_tables[] = { { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } }, /* ANN - Intel Atom processor Z3500 series */ { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } }, + /* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */ + { 6, 0x4c, 1, { 83300, 100000, 133300, 116700, + 80000, 93300, 90000, 88900, 87500 } }, }; static int match_cpu(u8 family, u8 model)
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