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SubjectRe: [PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
On Tue, Jun 21, 2016 at 7:10 AM, Tan Jui Nee <jui.nee.tan@intel.com> wrote:

> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86 devices.
>
> Signed-off-by: Yong, Jonathan <jonathan.yong@intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> Changes in V4:
> - Move Kconfig option CONFIG_X86_INTEL_NON_ACPI from
> [PATCH 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's
> to
> [PATCH 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system
> since the config is used in latter patch.

Waiting for a respin in accordance with Mika's comments.

You don't need to resend patch 1/3 it is already applied.

Yours,
Linus Walleij

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