Messages in this thread | | | Subject | Re: [PATCH v2] Linux VM workaround for Knights Landing A/D leak | From | Dave Hansen <> | Date | Tue, 14 Jun 2016 10:24:16 -0700 |
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On 06/14/2016 10:01 AM, Lukasz Anaczkowski wrote: > v2 (Lukasz Anaczkowski): > () fixed compilation breakage ...
By unconditionally defining the workaround code, even on kernels where there is no chance of ever hitting this bug. I think that's a pretty poor way to do it.
Can we please stick this in one of the intel.c files, so it's only present on CPU_SUP_INTEL builds?
Which reminds me...
> --- a/arch/x86/include/asm/pgtable_64.h > +++ b/arch/x86/include/asm/pgtable_64.h > @@ -178,6 +178,12 @@ extern void cleanup_highmap(void); > extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); > extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); > > +#define ARCH_HAS_NEEDS_SWAP_PTL 1 > +static inline bool arch_needs_swap_ptl(void) > +{ > + return boot_cpu_has_bug(X86_BUG_PTE_LEAK); > +}
Does this *REALLY* only affect 64-bit kernels?
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