Messages in this thread | | | Subject | Re: Using irq-crossbar.c | From | Marc Zyngier <> | Date | Mon, 13 Jun 2016 16:57:41 +0100 |
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On 13/06/16 16:49, Mason wrote: > On 13/06/2016 17:42, Lennart Sorensen wrote: >> On Mon, Jun 13, 2016 at 04:57:13PM +0200, Sebastian Frias wrote: >>> Actually we have 128 inputs and 24 outputs, the 24 outputs go straight to the GIC. >>> The HW block is a many-to-many router. >>> There are 128 32bit registers which specify, for each of the corresponding 128 inputs, to which of the 24 outputs it would be routed to. >>> >>> There are 4 32bit registers that can show the RAW status of the 128 inputs, but they do not latch on the inputs. >>> That's why our understanding is that on Linux terms it is not an interrupt controller, but just a many-to-many mux, the only real interrupt-controller (where one can set if the line is active high or low for example) is the GIC. >> >> Well that does just sound like a mux. But that does mean you either >> can't use more than 24 inputs at once, or you will be sharing interrupts. >> >> I really hate shared interrupts so I would never design something that >> way, but it is simpler. > > If I am not mistaken, the Cortex A9 MPCore GIC has 32 inputs.
Up to 224 SPIs actually, plus 16 PPIs.
M. -- Jazz is not dead. It just smells funny...
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