Messages in this thread Patch in this message | | | From | Andi Kleen <> | Subject | [PATCH 05/10] x86, perf: Use new topology_max_smt_threads() in HT leak workaround | Date | Thu, 5 May 2016 16:04:02 -0700 |
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From: Andi Kleen <ak@linux.intel.com>
Now that we have topology_max_smt_threads() use it to detect the HT workarounds for older CPUs.
v2: Use topology_max_smt_threads() Signed-off-by: Andi Kleen <ak@linux.intel.com> --- arch/x86/events/intel/core.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 6ea16f705de4..fcc9a010cb0a 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3991,16 +3991,14 @@ __init int intel_pmu_init(void) */ static __init int fixup_ht_bug(void) { - int cpu = smp_processor_id(); - int w, c; + int c; /* * problem not present on this CPU model, nothing to do */ if (!(x86_pmu.flags & PMU_FL_EXCL_ENABLED)) return 0; - w = cpumask_weight(topology_sibling_cpumask(cpu)); - if (w > 1) { + if (topology_max_smt_threads() > 1) { pr_info("PMU erratum BJ122, BV98, HSD29 worked around, HT is on\n"); return 0; } -- 2.5.5
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