Messages in this thread | | | Subject | Re: [PATCH 1/3] MIPS: ralink: fix MT7628 pinmux typos | From | John Crispin <> | Date | Thu, 19 May 2016 22:58:37 +0200 |
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On 19/05/2016 22:07, Álvaro Fernández Rojas wrote: > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Hi Alvaro,
I think my SoB is missing as i am the original author of these 3 patches.
John
> --- > arch/mips/ralink/mt7620.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c > index 0d3d1a9..caabee1 100644 > --- a/arch/mips/ralink/mt7620.c > +++ b/arch/mips/ralink/mt7620.c > @@ -223,9 +223,9 @@ static struct rt2880_pmx_func wled_an_grp_mt7628[] = { > #define MT7628_GPIO_MODE_GPIO 0 > > static struct rt2880_pmx_group mt7628an_pinmux_data[] = { > - GRP_G("pmw1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, > + GRP_G("pwm1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, > 1, MT7628_GPIO_MODE_PWM1), > - GRP_G("pmw0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, > + GRP_G("pwm0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, > 1, MT7628_GPIO_MODE_PWM0), > GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK, > 1, MT7628_GPIO_MODE_UART2), >
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