| From | Greg Kroah-Hartman <> | Subject | [PATCH 4.4 022/137] drm/amdgpu/gmc: use proper register for vram type on Fiji | Date | Mon, 18 Apr 2016 11:28:04 +0900 |
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4.4-stable review patch. If anyone has any objections, please let me know.
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From: Alex Deucher <alexander.deucher@amd.com>
commit b634de4f446c062a0c95ec4d150b4cf7c85e3526 upstream.
The offset changed on Fiji.
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c @@ -862,6 +862,8 @@ static int gmc_v8_0_late_init(void *hand return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0); } +#define mmMC_SEQ_MISC0_FIJI 0xA71 + static int gmc_v8_0_sw_init(void *handle) { int r; @@ -875,7 +877,12 @@ static int gmc_v8_0_sw_init(void *handle if (adev->flags & AMD_IS_APU) { adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; } else { - u32 tmp = RREG32(mmMC_SEQ_MISC0); + u32 tmp; + + if (adev->asic_type == CHIP_FIJI) + tmp = RREG32(mmMC_SEQ_MISC0_FIJI); + else + tmp = RREG32(mmMC_SEQ_MISC0); tmp &= MC_SEQ_MISC0__MT__MASK; adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp); }
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