Messages in this thread | | | Date | Fri, 15 Apr 2016 20:44:32 +0530 | From | Laxman Dewangan <> | Subject | Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control |
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On Friday 15 April 2016 08:44 PM, Jon Hunter wrote: > On 15/04/16 15:12, Laxman Dewangan wrote: >> >> >> All CSI pads are lined to single IO rail. > I agree with this and from the data-sheet I see the rail that powers the > CSI (and DSI) interfaces is called AVDD_DSI_CSI. But again, in the DT > document you are referring to csia, csib, csic, csid, csie, csif as > pins, but these don't appear to be physical pins, and this appears to be > more of a software means to control power to the various csi_x pins. > > It seems to me that each of the existing CSI_A_xxx pins/pads should be > mapped to or register with the appropriate power-down control and when > all pads are set to inactive this then triggers the power-down of all > the CSI_A_xxx pads.
I used pins as this is the property from pincon generic so that I can use the generic implementation.
Here, I will not go to the pin level control as HW does not support pin level control.
I will say the unit should be interface level. Should we say IO_GROUP_CSIA, IO_GROUP_CSIB etc?
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