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    Subject[PATCH 8/9] mtd: fsl-quadspi: disable AHB buffer prefetch
    Date
    From: Yunhui Cui <yunhui.cui@nxp.com>

    A-009282: QuadSPI: QuadSPI data pre-fetch can result in incorrect data
    Affects: QuadSPI
    Description: With AHB buffer prefetch enabled, the QuadSPI may return
    incorrect data on the AHB
    interface. The buffer pre-fetch is enabled if the fetch size as
    configured either in the LUT or in
    the BUFxCR register is greater than 8 bytes.
    Impact: Only 64 bit read allowed.
    Workaround: Keep the read data size to 64 bits (8 Bytes), which disables
    the prefetch on the AHB buffer,
    and prevents this issue from occurring.

    Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
    ---
    drivers/mtd/spi-nor/fsl-quadspi.c | 29 +++++++++++++++++++++++------
    1 file changed, 23 insertions(+), 6 deletions(-)

    diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
    index fea18b6..d9f3e50 100644
    --- a/drivers/mtd/spi-nor/fsl-quadspi.c
    +++ b/drivers/mtd/spi-nor/fsl-quadspi.c
    @@ -752,19 +752,36 @@ static void fsl_qspi_init_abh_read(struct fsl_qspi *q)
    {
    void __iomem *base = q->iobase;
    int seqid;
    + const struct fsl_qspi_devtype_data *devtype_data = q->devtype_data;

    /* AHB configuration for access buffer 0/1/2 .*/
    qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF0CR);
    qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF1CR);
    qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF2CR);
    +
    /*
    - * Set ADATSZ with the maximum AHB buffer size to improve the
    - * read performance.
    + * Errata: A-009282: QuadSPI data prefetch may result in incorrect data
    + * Workaround: Keep the read data size to 64 bits (8 bytes).
    + * This disables the prefetch on the AHB buffer and
    + * prevents this issue from occurring.
    */
    - qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
    - ((q->devtype_data->ahb_buf_size / 8)
    - << QUADSPI_BUF3CR_ADATSZ_SHIFT),
    - base + QUADSPI_BUF3CR);
    + if (devtype_data->devtype == FSL_QUADSPI_LS2080A ||
    + devtype_data->devtype == FSL_QUADSPI_LS1021A) {
    +
    + qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
    + (1 << QUADSPI_BUF3CR_ADATSZ_SHIFT),
    + base + QUADSPI_BUF3CR);
    +
    + } else {
    + /*
    + * Set ADATSZ with the maximum AHB buffer size to improve the
    + * read performance.
    + */
    + qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
    + ((q->devtype_data->ahb_buf_size / 8)
    + << QUADSPI_BUF3CR_ADATSZ_SHIFT),
    + base + QUADSPI_BUF3CR);
    + }

    /* We only use the buffer3 */
    qspi_writel(q, 0, base + QUADSPI_BUF0IND);
    --
    2.1.0.27.g96db324
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