Messages in this thread | | | Date | Thu, 31 Mar 2016 10:00:18 -0700 | From | Tony Lindgren <> | Subject | Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck |
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* Keerthy <a0393675@ti.com> [160331 02:26]: > > > On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote: > >On 03/31/2016 12:32 AM, Tony Lindgren wrote: > >>* Tony Lindgren <tony@atomide.com> [160330 14:19]: > >>>* Keerthy <j-keerthy@ti.com> [160314 05:04]: > >>>>This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. > >>>>Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz > >>>>external > >>>>crystal is not enabled at power up. Instead the CPU falls back to using > >>>>an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is > >>>>usually > >>>>20MHz on boards so far (which gives an emulated frequency of 32.786KHz) > >>> > >>>Thanks applying into omap-for-v4.6/fixes. > >> > >>Actually let's wait a review from Tero on this one, not sure > >>about the pseudo clock naming here. So dropping for now. > > > >The patch is fine for me, I didn't comment anything before as I thought > >you already applied it. > > > >Acked-by: Tero Kristo <t-kristo@ti.com> > > Thanks Tero.
OK applying with Tero's ack.
Tony
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