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Subject[PATCH 0/2] PCI: Skylake PCH ACS quirks
Intel Skylake systems attempted to implement ACS on the PCH root
ports, but it came out a wee bit off. As noted in the second patch
and the datasheets from Intel, dwords were used for the ACS
capability and control words, so we see the capabilities correctly
but the control register is an extra 2 bytes offset. With this
quirk we can fix the kernel, unfortunately lspci will still show
the wrong ACS control bits though. Thanks,



Alex Williamson (2):
PCI: Reverse standard ACS vs device specific ACS enabling
PCI: Quirk PCH root port ACS for Sunrise Point

drivers/pci/pci.c | 10 ++----
drivers/pci/quirks.c | 84 +++++++++++++++++++++++++++++++++++++++++++++++++-
include/linux/pci.h | 7 +++-
3 files changed, 91 insertions(+), 10 deletions(-)

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