Messages in this thread | | | Subject | Re: [PATCH 2/3] phy: exynos-mipi-video: Rewrite handling of phy registers | From | Sylwester Nawrocki <> | Date | Thu, 24 Mar 2016 12:48:38 +0100 |
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On 03/23/2016 12:09 PM, Marek Szyprowski wrote: > Controlling Exynos MIPI DPHY is done by handling 2 registers: one for > phy reset and one for enabling it. This patch moves definitions of those > 2 registers to speparate exynos_mipi_phy_desc structure, which can be > defined separately for each PHY for each supported hardware variant. > This code rewrite is needed to add support for newer Exynos SoCs, which > have MIPI PHY related registers at different offsets or even different > register regions. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
I've tested this patch series on Trats2 and an exynos5433 based board and it seems to be all working well.
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-- Thanks, Sylwester
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