lkml.org 
[lkml]   [2016]   [Mar]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH 2/3] phy: exynos-mipi-video: Rewrite handling of phy registers
From
Date
On 03/23/2016 12:09 PM, Marek Szyprowski wrote:
> Controlling Exynos MIPI DPHY is done by handling 2 registers: one for
> phy reset and one for enabling it. This patch moves definitions of those
> 2 registers to speparate exynos_mipi_phy_desc structure, which can be
> defined separately for each PHY for each supported hardware variant.
> This code rewrite is needed to add support for newer Exynos SoCs, which
> have MIPI PHY related registers at different offsets or even different
> register regions.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

I've tested this patch series on Trats2 and an exynos5433 based
board and it seems to be all working well.

Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

--
Thanks,
Sylwester

\
 
 \ /
  Last update: 2016-03-24 13:21    [W:0.081 / U:0.012 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site