lkml.org 
[lkml]   [2016]   [Mar]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 3.19.y-ckt 19/70] libata: Align ata_device's id on a cacheline
    Date
    v3.19.8-ckt17 -stable review patch.  If anyone has any objections, please let me know.

    ---8<------------------------------------------------------------

    From: Harvey Hunt <harvey.hunt@imgtec.com>

    commit 4ee34ea3a12396f35b26d90a094c75db95080baa upstream.

    The id buffer in ata_device is a DMA target, but it isn't explicitly
    cacheline aligned. Due to this, adjacent fields can be overwritten with
    stale data from memory on non coherent architectures. As a result, the
    kernel is sometimes unable to communicate with an ATA device.

    Fix this by ensuring that the id buffer is cacheline aligned.

    This issue is similar to that fixed by Commit 84bda12af31f
    ("libata: align ap->sector_buf").

    Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Tejun Heo <tj@kernel.org>
    Signed-off-by: Kamal Mostafa <kamal@canonical.com>
    ---
    include/linux/libata.h | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/include/linux/libata.h b/include/linux/libata.h
    index e67edef..ac5bd91 100644
    --- a/include/linux/libata.h
    +++ b/include/linux/libata.h
    @@ -716,7 +716,7 @@ struct ata_device {
    union {
    u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
    u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
    - };
    + } ____cacheline_aligned;

    /* DEVSLP Timing Variables from Identify Device Data Log */
    u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];
    --
    2.7.0
    \
     
     \ /
      Last update: 2016-03-16 22:01    [W:4.295 / U:0.696 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site