Messages in this thread | | | Date | Mon, 8 Feb 2016 12:01:51 +0100 | From | Antoine Tenart <> | Subject | Re: [PATCH 1/6] irqchip: add the Alpine MSIX interrupt controller |
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On Mon, Feb 08, 2016 at 10:56:16AM +0000, Marc Zyngier wrote: > On 08/02/16 10:44, Antoine Tenart wrote: > > On Mon, Feb 08, 2016 at 10:32:08AM +0000, Marc Zyngier wrote: > >> On 08/02/16 10:26, Antoine Tenart wrote: > >>>>> +static int alpine_msix_init(struct device_node *node, > >>>>> + struct device_node *parent) > >>>>> +{ > >>>>> + struct alpine_msix_data *priv; > >>>>> + struct resource res; > >>>>> + int ret; > >>>>> + > >>>>> + priv = kzalloc(sizeof(*priv), GFP_KERNEL); > >>>>> + if (!priv) > >>>>> + return -ENOMEM; > >>>>> + > >>>>> + spin_lock_init(&priv->msi_map_lock); > >>>>> + > >>>>> + ret = of_address_to_resource(node, 0, &res); > >>>>> + if (ret) { > >>>>> + pr_err("Failed to allocate resource\n"); > >>>>> + goto err_priv; > >>>>> + } > >>>>> + > >>>>> + priv->addr_high = upper_32_bits((u64)res.start); > >>>>> + priv->addr_low = lower_32_bits(res.start) + ALPINE_MSIX_SPI_TARGET_CLUSTER0; > >>>> > >>>> This is a bit odd. If you always set bit 16, why isn't that reflected in > >>>> the base address coming from the DT? > >>> > >>> The 20 least significant bits of addr_low provide direct information > >>> regarding the interrupt destination, so I thought it would be clearer > >>> to have this explicitly in the driver so that we know what those bits > >>> mean. > >> > >> So what is this information? TARGET_CLUSTER0 is not very expressive, and > >> doesn't show what the alternatives are. Could you please elaborate a bit > >> on that front? > > > > For now lots of bits are reserved, so there aren't many alternatives. > > Bits [18:17] are used to set the GIC to which to route the MSI and bit > > 16 must be set when this target GIC is the primary GIC (bits [18:17] set > > to 0x0). There aren't other options available for now (that I'm aware > > of) for the target GIC configuration. > > OK. So maybe add that as a comment, so that people know what is > happening there. And if the code gets updated to include new > functionalities, it will be easier to track the changes.
OK, I'll update.
Antoine
-- Antoine Ténart, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com [unhandled content-type:application/pgp-signature] | |